may 2012 ? 1983 fairchild semiconductor corporation www.fairchildsemi.com mm74hc86 ? rev. 1.4.0 mm74hc86 ? quad 2-input exclusive or gate mm74hc86 quad 2-input exclusive or gate features ? typical propagation delay: 9ns ? wide operating voltage range: 2?6v ? low input current: 1ma maximum ? low quiescent current: 20ma max. (74 series) ? output drive capability: 10 ls-ttl loads figure 1. pin assignments (top view) description the mm74hc86 exclusive or gate utilizes advanced silicon-gate cmos technology to achieve operating speeds similar to equivalent ls-ttl gates, while maintaining the low power consumption and high noise immunity characteristic of standard cmos integrated circuits. these gates are fully buffered and have a fanout of 10 ls-ttl loads. the 74hc logic family is functionally as well as pin-out compatible with the standard 74ls logic family. all inputs are protected from damage due to static discharge by internal diode clamps to v cc and ground. table 1. truth table inputs outputs a b y (1) l l l l h h h l h h h l note: 1. b a b a b a y ? ? ? ? ordering information part number operating temperature range package packing method mm74hc86m -40 to +85c 14-lead, small outli ne integrated circuit (soic), jedec ms-012, 0.150" narrow tube mm74hc86mx tape & reel mm74hc86mtc 14-lead, thin shrink small outline package (tssop), jedec mo-153, 4.4mm wide tube mm74hc86mtcx tape & reel note: 2. pb-free package per jedec j-std-020b.
? 1983 fairchild semiconductor corporation www.fairchildsemi.com mm74hc86 ? rev. 1.4.0 2 mm74hc86 ? quad 2-input exclusive or gate absolute maximum ratings stresses exceeding the absolute maximum ratings may dam age the device. the device may not function or be operable above the recommended operating conditions and st ressing the parts to these levels is not recommended. in addition, extended exposure to stresses above the recomm ended operating conditions may affect device reliability. absolute maximum ratings are stress ratings only. unless other wise specified, all voltages are referenced to ground. symbol parameter min. max. unit v cc supply voltage -0.5 7.0 v v in dc input voltage -1.5 v cc +1.5 v v out dc output voltage -0.5 v cc +0.5 v i ik , i ok clamp diode current 20 ma i out dc output current, per pin 25 ma i cc dc vcc or gnd current, per pin 50 ma t stg storage temperature range -65 +150 c t l lead temperature (soldering, 10 seconds) 260 c p d power dissipation (3, 4) 600 mw note: 3. power dissipation temperature derating ? plastic ?n? package: -12 mw/c from 65c to 85c. 4. s.o. package only 500mw. recommended operating conditions the recommended operating conditions table defines th e conditions for actual device operation. recommended operating conditions are specified to en sure optimal performance to the datash eet specifications. fairchild does not recommend exceeding them or designing to absolute maximum ratings. symbol parameter conditions min. max. unit v cc supply voltage 2 6 v v in , v out dc input or output voltage 0 v cc v t a operating temperature range -40 +85 c t r , t f input rise or fall times v cc = 2.0v 1000 ns v cc = 4.5v 500 v cc = 6.0v 400
? 1983 fairchild semiconductor corporation www.fairchildsemi.com mm74hc86 ? rev. 1.4.0 3 mm74hc86 ? quad 2-input exclusive or gate dc electrical characteristics (5) symbol parameter condition v cc (v) t a =25c t a =-40 to +85c t a =-55 to +125c units typ. guaranteed limit v ih minimum high level input voltage 2.0 1.5 1.5 1.5 v 4.5 3.15 3.15 3.15 6.0 4.2 4.2 4.2 v il maximum low level input voltage 2.0 0.5 0.5 0.5 v 4.5 1.35 1.35 1.35 6.0 1.8 1.8 1.8 v oh minimum high level output voltage v in = v ih or v il , |i out | 20a 2.0 2.0 1.9 1.9 1.9 v 4.5 4.5 4.4 4.4 4.4 6.0 6.0 5.9 5.9 5.9 v in = v ih or v il , |i out | 4.0ma 4.5 4.2 3.98 3.84 3.70 v in = v ih or v il , |i out | 5.2ma 6.0 5.7 5.48 5.34 5.20 v ol maximum low level output voltage v in = v ih or v il , |i out | 20a 2.0 0 0.1 0.1 0.1 v 4.5 0 0.1 0.1 0.1 6.0 0 0.1 0.1 0.1 v in = v ih or v il , |i out | 4.0ma 4.5 0.2 0.26 0.33 0.40 v in = v ih or v il , |i out | 5.2ma 6.0 0.2 0.26 0.33 0.40 i in maximum input current v in = v cc or gnd 6.0 0.1 1.0 1.0 ma i cc maximum quiescent supply current v in = v cc or gnd, i out = 0ma 6.0 2.0 20 40 ma note: 5. for a power supply of 5v 10%, the worst-case output voltages (v oh and v ol ) occur for hc at 4.5v. thus, the 4.5v values should be used when designing with this supply. worst-case v ih and v il occur at v cc = 5.5v and 4.5v, respectively. (the v ih values at 5v and 5.5v are 3.5v and 3.85 v, respectively.) the worst-case leakage current (i in , i cc , and i oz ) occurs for cmos at the higher voltage, so the 6.0v values should be used.
? 1983 fairchild semiconductor corporation www.fairchildsemi.com mm74hc86 ? rev. 1.4.0 4 mm74hc86 ? quad 2-input exclusive or gate ac electrical characteristics symbol parameter conditions v cc t a =25c t a =-40 to +85c t a =-55 to +125c unit s typ. guaranteed limit t phl , t plh maximum propagation delay c l = 15pf, t r = t f = 6ns 5.0 12 20 ns t phl , t plh maximum propagation delay c l = 50pf, t r = t f = 6ns 2.0 60 120 151 179 ns 4.5 12 24 30 36 6.0 10 20 26 30 t tlh , t thl maximum output rise and fall time 2.0 30 75 95 110 ns 4.5 8 15 19 22 6.0 7 13 16 19 c pd power dissipation capacitance (per gate) (6) 25 pf c in maximum input capacitance 5 10 10 10 pf note: 6. c pd determines the no-load dynamic power consumption, p d = c pd v cc 2 f + i cc v cc , and the no load dynamic current consumption, i s = c pd v cc f + i cc .
? 1983 fairchild semiconductor corporation www.fairchildsemi.com mm74hc86 ? rev. 1.4.0 5 mm74hc86 ? quad 2-input exclusive or gate physical dimensions figure 2. 14-lead, small-outline integrated ci rcuit (soic), jedec ms-012, 0.150" narrow package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . land pattern recommendation notes: unless otherwise specified a) this package conforms to jedec ms-012, variation ab, issue c, b) all dimensions are in millimeters. c) dimensions do not include mold flash or burrs. d) landpattern standard: soic127p600x145-14m e) drawing conforms to asme y14.5m-1994 f) drawing file name: m14arev13 pin one indicator 8 0 seating plane detail a scale: 20:1 gage plane 0.25 x 45 1 0.10 c c b ca 7 m 14 b a 8 see detail a 5.60 0.65 1.70 1.27 8.75 8.50 7.62 6.00 4.00 3.80 (0.33) 1.27 0.51 0.35 1.75 max 1.50 1.25 0.25 0.10 0.25 0.19 (1.04) 0.90 0.50 0.36 r0.10 r0.10 0.50 0.25
? 1983 fairchild semiconductor corporation www.fairchildsemi.com mm74hc86 ? rev. 1.4.0 6 mm74hc86 ? quad 2-input exclusive or gate physical dimensions figure 3. 14-lead, thin-shrink small-outline package (tssop), jedec mo-153, 4.4mm wide package drawings are provided as a service to customers consi dering fairchild components. drawings may change in any manner without notice. please note the revision and/or date on the drawi ng and contact a fairchild semiconductor representative to ver ify or obtain the most recent revision. package specifications do not expand the terms of fairchild?s worldwide terms and conditions, specifically the warranty therein, which covers fairchild products. always visit fairchild semiconductor?s online packagi ng area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ . c. dimensions are exclusive of burrs, mold flash, and tie bar extrusions f. drawing file name: mtc14rev6 r0.09 min 12.00 top & bottom 0.43 typ 1.00 d. dimensioning and tolerances per ansi y14.5m, 1982 r0.09min e. landpattern standard: sop65p640x110-14m 0.65 6.10 1.65 0.45 a. conforms to jedec registration mo-153, variation ab, ref note 6 b. dimensions are in millimeters
? 1983 fairchild semiconductor corporation www.fairchildsemi.com mm74hc86 ? rev. 1.4.0 7 mm74hc86 ? quad 2-input exclusive or gate
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